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Then the software instructs the stepper motors to position the component over that site and lower it on to the circuit board Some applications, such as those using ceramic substrates that are prone to inconsistent degrees of shrinkage during fabrication (eg, low-temperature, co-fired ceramic, or LTCC), may develop a discrepancy between the software design and the actual circuit board component positions (pads) In this case, the placement site of each component is determined directly using fiducials in close proximity to that component site Although local fiducials may enhance component placement accuracy to some degree, especially when tolerance stack-up in the product causes it to deviate from the design files, this approach requires added processing time by the machine computer The result is a decrease in placement speed that can develop into an appreciable process delay, particularly for large production volumes..

The use of a buffer to for the six inverters in a 7404 IC power and LED is shown in Figure 3-6..

Vision system limitations are determined by the speed with which the computer can process information (eg, circuit board coordinates, component geometries, defects) The more information to be processed, the slower is the component placement step For products requiring the placement of thousands of parts per circuit board, even an additional few tenths of a second per component can add up to a significant loss of production throughput Similarly, there are operational limitations on vision systems themselves (cameras and optics) The trade-off is between resolution and the range of processable part sizes The underlying premise is pixel count The vision system requires a minimum number of pixels to recognize a feature (lead, solder bump, fiducial, etc) A very small feature (eg, a flipchip solder bump) requires both high magnification and high resolution (ie.

, pixels/length or pixels/area) in order for the system to recognize the feature However, using the same system to recognize a large BGA package would require a magnification that may well be outside the capability of those same optics Moreover, even if the package could be brought into the field of view, using the same high resolution, which is now not necessary, will overload the computer memory and bog down the software processing step, resulting in a slowing of the placement process And conversely, the same camera that can efficiently process a large, 32 mm QFP (208 I/O) in a single image would generally not have sufficient resolution to process a flip-chip solder bump of 01 mm diameter Therefore, the choice of optics is critical to maximize the efficiency of the pick-and-place function for a particular product.

For optimum efficiency, it may be necessary to place the two components on separate machines Alternatively, multiple cameras and optics may be used on a single piece of equipment Cost becomes a critical factor Once the components have been placed, the circuit board is soldered using one of the techniques briefly described in the following sections The component placement step is synergistic with the soldering step and, in particular, reflow soldering That synergism arises from the fact that placement inaccuracies can be compensated by the self-alignment of packages arising from the surface tension (more accurately, the solder-flux interfacial tension) of the molten solder This self-alignment phenomenon opens the placement window for passive devices larger than about 0603, smaller LCCCs, and 127 mm pitch areaarray packages of up to several hundred balls.

Unfortunately, for smaller passive devices and larger area-array packages, the self-alignment process becomes less capable of compensating for placement errors In the case of smaller passive devices, there is the increased likelihood that an imbalance of surface tension forces can result in an asymmetric movement of the part, causing the tombstoning defect In the case of larger area-array components, poor placement (which is becoming more critical with the finer pitches of smaller balls) cannot always be remedied by self-alignment simply because of the greater weight of the component The topic of soldering is described in greater detail in Chap 42 Therefore, this chapter offers only a brief overview of each approach, with the discussion limited to its relevance to the overall assembly process 40334 Reflow Soldering.

Reflow soldering is the technique in which a circuit board, which has the components placed on the solder deposit (either as paste or preforms) is passed through a furnace (oven) in order to melt the solder and form the joints The furnace may be a batch type in which the circuit boards must be loaded and unloaded, one group at a time The operator inputs the batch furnace time-temperature profile into the controller that alters the power to a set of heating coils as a function of time The atmosphere can be very well controlled, including the use of vacuum The batch furnace is advantageous for small production lots, including development work or when the time-temperature profile and environment must be carefully controlled for the application The second furnace has an inline configuration The circuit boards continuously enter one end unsoldered and exit the other end soldered.